MCS-8085 Family:

• 8085-CPU
• 8155-RAM+ 3 I/O Ports+Timer
• 8156-RAM+ 3 I/O Ports+Timer
• 8185-SRAM
• 8202-Dynamic RAM Controller
• 8203-Dynamic RAM Controller
• 8205-1 Of 8 Binary Decoder
• 8206-Error Detection & Correction Unit
• 8207-DRAM Controller
• 8210-TTL To MOS Shifter & High Voltage Clock Driver
• 8212-8 Bit I/O Port
• 8216-4 Bit Parallel Bidirectional Bus Driver
• 8219-Bus Controller
• 8222-Dynamic RAM Refresh Controller
• 8226-4 Bit Parallel Bidirectional Bus Driver
• 8231-Arithmetic Processing Unit
• 8232-Floating Point Processor
• 8237-DMA Controller
• 8251-Communication Controller
• 8253-Programmable Interval Timer
• 8254-Programmable Interval Timer
• 8255-Programmable Peripheral Interface
• 8256-Multifunction Support Controller
• 8257-DMA Controller
• 8259-Programmable Interrupt Controller
• 8271-Programmable Floppy Disk Controller
• 8272-Single/Double Density Floppy Disk Controller
• 8273-Programmable HDLC/SDLC Protocol Controller
• 8274-Multi-Protocol Serial Controller
• 8275-CRT Controller
• 8276-Small System CRT Controller
• 8278-Programmable KeyBoard Interface
• 8279-KeyBoard/Display Controller
• 8282-8-bit Non-Inverting Latch with Output Buffer
• 8283-8-bit Inverting Latch with Output Buffer
• 8291-GPIB Talker/Listener
• 8292-GPIB Controller
• 8293-GPIB Transceiver
• 8294-Data Encryption/Decryption Unit+1 O/P Port
• 8295-Dot Matrix Printer Controller
• 8296-GPIB Transceiver
• 8297-GPIB Transceiver
• 8355-16,384-bit (2048 x 8) ROM with I/O
• 8604-4096-bit (512 x 8) PROM
• 8702-2K-bit (256 x 8 ) PROM
• 8755-EPROM+2 I/O Ports

Intel 8085

The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1977. It was binary-compatible with the more-famous Intel 8080 but required less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built.

The "5" in the model number came from the fact that the 8085 required only a +5-volt (V) power supply rather than the +5V, -5V and +12V supplies the 8080 needed. Both processors were sometimes used in computers running the CP/M operating system, and the 8085 later saw use as a microcontroller (much by virtue of its component count reducing feature). Both designs were eclipsed for desktop computers by the compatible but more capable Zilog Z80, which took over most of the CP/M computer market as well as taking a large share of the booming home computer market in the early-to-mid-1980s. The 8085 had a very long life as a controller. Once designed into such products as the DECtape controller and the VT100 video terminal in the late 1970s, it continued to serve for new production throughout the life span of those products (generally many times longer than the new manufacture lifespan of desktop computers).

CPU architecture

The 8085 Architecture follows the von Neumann architecture, with a 16-bit address bus, and a 8-bit data bus. The 8085 incorporated all the features of the 8224 (clock generator) and the 8228 (system controller), increasing the level of system integration. The 8085 along with an 8156 RAM and 8355/8755 ROM/PROM constituted a complete system. The 8085 used a multiplexed Data Bus and required the 825X-5 support chips. The address was split between the 8-bit address bus and 8-bit data bus. The on-chip address latch of 8155/8355/8755 memory chips allowed a direct interface with the 8085. The processor was designed using NMOS circuitry and the later "H" versions were implemented in Intel's enhanced NMOS process called HMOS, originally developed for fast static RAM products. The 8085 used 6,500 transistors

Registers:

The 8085 can access 216 (= 65,536) individual 8-bit memory locations, or in other words, its address space is 64 KB. Unlike some other microprocessors of its era, it has a separate address space for up to 28 (=256) I/O ports. It also has a built in register array which are usually labeled A (Accumulator), B, C, D, E, H, and L. Further special-purpose registers are the 16-bit Program Counter (PC), Stack Pointer (SP), and 8-bit flag register F. The microprocessor has three maskable interrupts (RST 7.5, RST 6.5 and RST 5.5), one Non-Maskable interrupt (TRAP), and one externally serviced interrupt (INTR). The RST n.5 interrupts refer to actual pins on the processor-a feature which permitted simple systems to avoid the cost of a separate interrupt controller chip.

Buses

* Address bus - 16 line bus accessing 216 memory locations (64 KB) of memory.
* Data bus - 8 line bus accessing one (8-bit) byte of data in one operation. Data bus width is the traditional measure of processor bit designations, as opposed to address bus width, resulting in the 8-bit microprocessor designation.
* Control buses - Carries the essential signals for various operations.

Intel 8080

The Intel 8080 was an early microprocessor designed and manufactured by Intel. The 8-bit CPU was released in April 1974 running at 2 MHz (at up to 500,000 instructions per second), and is generally considered to be the first truly usable microprocessor CPU design. It was implemented in NMOS.

Programming model

The Intel 8080 was the successor to the Intel 8008; this was due to its being assembly language source compatible[vague], since it used the same instruction set developed by Computer Terminal Corporation. The 8080's large 40 pin DIP packaging permitted it to provide a 16-bit address bus and an 8-bit data bus, allowing easy access to 64 kilobytes of memory.

Registers

The processor had seven 8-bit registers, (A, B, C, D, E, H, and L) where A was the 8-bit accumulator and the other six could be used as either byte-registers or as three 16-bit register pairs (BC, DE, HL) depending on the particular instruction. Some instructions also enabled HL to be used as (a limited) 16-bit accumulator. It also had a 16-bit stack pointer to memory (replacing the 8008's internal stack), and a 16-bit program counter.


Commands

Most of the 8-bit operations were possible between the accumulator and either one of the registers or the memory cell, indexed by the 16-bit value of the register pair HL. Moving operations were supported between any two registers, or between any register and the HL-indexed memory cell. Due to the highly regular machine code format for MOV commands, the opcodes included those for moving a byte from a given register into the same register (MOV A,A , for instance). These commands were seldom used, however, unless programmed delays were needed. What would have been instruction to move from the HL-indexed memory cell into the same memory cell (i.e., MOV M,M) instead was HLT (for halt). HLT halted the processor until external reset or interrupt signals were received.

All processor commands were coded by one byte, but some of them were followed by one or two bytes of data, a memory address, or a port number. The register-to-register data-move commands were all coded by one byte, making up about a quarter of the commands in the processor-command system. The processor had eight one-byte commands to call the subroutines located at the fixed addresses 0000h, 0008h, 0010h, ... 0038h (RST). These commands were frequently used in the interrupt-handling or system-library calls.

The most sophisticated command (and the longest to execute) was XTHL, which was used for exchanging the register pair HL with the value stored at the address indicated by the stack pointer.

Intel 8008

The Intel 8008 was an early byte-oriented microprocessor designed and manufactured by Intel and introduced in April 1972. Originally known as the 1201, the chip was commissioned by Computer Terminal Corporation (CTC) to implement an instruction set designed for their Datapoint 2200 programmable terminal. As the chip was delayed and did not meet CTC's performance goals, the 2200 ended up using CTC's own TTL based CPU instead. An agreement permitted Intel to market the chip to other customers after Seiko expressed an interest in using it for a calculator.

History

CTC formed in San Antonio in 1968 under the direction of Austin O. "Gus" Roche and Phil Ray, both NASA engineers. Roche, in particular, was primarily interested in producing a desktop computer. However, given the immaturity of the market, the company's business plan mentioned only a ASR-33 Teletype replacement, which shipped as the Datapoint 3300. The case, designed by John "Jack" Frassanito, was deliberately designed to fit in the same space as an IBM Selectric typewriter, and used a video screen shaped to be the same aspect ratio as the IBM 029 punch card terminal.[2] Although commercially successful, the 3300 had ongoing heat problems due to the amount of circuitry packed into such a small space.

In order to address the heating and other issues, a re-design started that featured all of the internal circuitry re-implemented on a single chip. Looking for a company able to produce their chip design, Roche turned to Intel, then primarily a vendor of memory chips.[2] Roche met with Bob Noyce, who expressed concern with the concept; Frassanito recalls that "Noyce said it was an intriguing idea, and that Intel could do it, but it would be a dumb move. He said that if you have a computer chip, you can only sell one chip per computer, while with memory, you can sell hundreds of chips per computer."[2] Another major concern was that Intel's existing customer base purchased their memory chips for use with their own processor designs; if Intel introduced their own processor they might be seen as a competitor, and their customers might look elsewhere for memory. Nevertheless, Noyce agreed to a $50,000 development contract in early 1970. Texas Instruments (TI) was also brought in as a second supplier.

TI was able to quickly make samples of the 1201 based on Intel drawings, but these proved to be buggy and were rejected. Intel's own versions were delayed. CTC decided to re-implement the new version of the terminal using discrete TTL instead of a single CPU. The new system was released as the Datapoint 2200 in the spring 1970, with their first sale to General Mills on 25 May 1970.[2] CTC paused development of the 1201 after the 2200 was released, as it was no longer needed. Six months later, Seiko approached Intel expressing an interest in using the 1201 in a scientific calculator, likely after seeing the success of the simpler Intel 4004 used by Busicom in their business calculators. A small re-design followed, expanding from a 16-pin to 18-pin design, and the new 1210 was delivered to CTC in late 1971.[2]

By that point CTC had once again moved on, this time to the Datapoint 2200 II, which was faster and included a hard drive. The 1201 was no longer powerful enough for the new model. CTC voted to end their involvement with the 1201, leaving the design's intellectual property to Intel instead of paying the $50,000 contract. Intel renamed it the 8008, and put it in their catalog in April 1972 priced at $120. Intel's initial worries about their existing customer base leaving them proved unfounded, and the 8008 went on to be a commercially successful design. This was followed by the Intel 8080, and then the hugely successful Intel x86 family.[2]